In general terms, a computer network is a collection of end systems (also known as nodes) interconnected through one or more communication links. Generally, the end systems both send data to other end systems on the network and receive data sent by other end systems on the network. When an end system is a sender of data, it is referred to as a source for that data; when it is a receiver of data, it is referred to as a destination for the data. Typically, end systems act as both sources and destinations depending on whether they are sending or receiving data. When acting as a source, the system typically sends data in the form of messages over a communication link. Messages can flow back and forth to other communication links and end systems within the network through bridges or routers, which are used to interconnect multiple communication links.
Each message comprises a sequence of bits. Typically, messages sent over a network are divided up into smaller blocks of information called packets. The flow of packets in the network is usually referred to as traffic. An important design objective in networks is controlling traffic so that individual packets will not be transmitted at a faster rate than they can be processed by the communication links, or intermediate systems such as bridges or routers, through which the packets will pass, or by the destinations.
Asynchronous Transfer Mode (ATM) is one of the general class of digital switching technologies that relay and route traffic by means of a virtual circuit identifier (VCI) contained within the cell. Unlike common packet technologies, such as X.25 or frame relay, ATM uses very short, fixed length units of information, called cells. In applications utilizing ATM, packets at a source are first broken up into these fixed length packets (ATM cells), transmitted, and then reassembled at a destination. ATM cells are 53 bytes long. They consist of a 5-byte header (containing an identifier of data flow which implicitly identifies the source address and the destination address) and a 48-byte information field. The header of an ATM cell contains all the information the network needs to relay the cell from one node to the next over a pre-established route. User data is contained in the remaining 48 bytes.
ATM uses a concept of virtual networking (or channels) to pass traffic between two locations, establishing virtual connections between a pair of ATM end-systems which are needed to connect a source with a destination. These connections are termed "virtual" to distinguish them from dedicated circuits. ATM cells always traverse the same path from source to destination. However, ATM does not have to reserve the path for one user exclusively. Any time a given user is not occupying a link, another user is free to use it.
ATM connections exist only as sets of routing tables held in each network node, switch, or other intermediate system, based on the virtual circuit identifier (VCI) and virtual path identifier (VPI) contained in the cell header. When a virtual path is established, each node (or switch) is provided with a set of lookup tables that identify an incoming cell by header address, route it through the node to the proper output port, and overwrite the incoming VCI/VPI with a new one that the next node along the route will recognize as an entry in its routing table.
The cell is thus passed from switch to switch over a prescribed route, but the route is "virtual" since the facility carrying the cell is dedicated to it only while the cell traverses it. Two cells that are ultimately headed for different destinations may be carried, one after the other, over the same physical wire for a common portion of their journey.
With current implementations of ATM, adapters use local memory in a variety of ways. A first implementation uses two local memories in the ATM adapter. One ATM adapter local memory is used for ATM cell reassembly, while another ATM adapter local memory is used to segment packets in ATM cells. With such an arrangement, an extra ATM adapter local memory is necessary for segmentation.
In another current ATM implementation, one local memory in an ATM adapter is used for both ATM cell reassembly and packet segmentation. In such an implementation, the operations of segmentation and reassembly are done concurrently in the one local memory. The available bandwidth from the local memory is the maximum number of bytes (or bits) one can read or write from or to at a unit of time. This bandwidth is a function of the local memory speed and its data width. With such an arrangement, as an example, in order to support a serial line input/output rate of 155.52 Mbps, a bandwidth of 155.52 times 4 is needed. The 4 Mbps comes from the fact that when a packet is reassembled it is written first, cell after cell, then read at 155.52 times 2 when reassembly is complete. In addition, when a packet is segmented it is first written into the local memory and then read, cell by cell, each time for transmission on the serial line (i.e., 155.52 Mbps times 2). Thus, the bandwidth requirements from the local memory is bigger when the local memory is used for both segmentation and reassembly. the segmentation is accomplished by first preforming a direct memory access (DMA) of the whole packet into the ATM adapter local memory and then starting to segment the packet by sending an ATM cell one at a time.
In still another ATM implementation, a local memory of an ATM adapter will only be used to store a number of control variables. In such an implementation, segmentation and reassembly are accomplished in a host memory. With such an implementation, bursts of 48-bytes are not optimal to use the maximum available system bus bandwidth because (1) the longer the DMA transfer bursts are, the higher bandwidth from the system bus is obtained (this is also true for the local memory since DRAM also uses bursts, and the longer the bursts are, the more bandwidth one can get out of the local memory); and (2) "48" is not a binary number; since most cache lines are in length of 2 to the X power, if a write operation finishes in the middle of a CPU cache line, the next burst will result in one additional update because writing in the middle of the CPU cache line causes the CPU to update the CPU cache line again in its main memory.
A method of handling the reassembly process in one ATM adapter local memory is needed where segmentation may be done by utilizing a relatively small buffer on a chip.